1. Field of the Invention
The present invention relates to semiconductor integrated circuits such as microprocessor. More particularly, the invention relates to a semiconductor integrated circuit with a self-test function capable of producing self-test data.
2. Description of the Prior Art
FIG. 1 is a block diagram showing a configuration of a microprocessor with a self-test function as illustrated, for example, in the "The MC6804P2 Built-in Self-Test" on Pages 295 to 300 of proceedings from the 1983 International Test Conference.
In the figure, numeral 21 denotes a microprocessor and 22 is a program counter. Numeral 23 is a program memory consisting of a ROM which stores programs for controlling each functional block, as well as a self-test program 23a and prediction values of the test result. Numeral 24 is a data memory consisting of a ROM which stores self-test input data. Numeral 25 denotes a signature register which compresses data on an X bus 29 to be described later. Numeral 26 is a stack constituted by a temporary storage unit of the last-in first-out type. Numeral 27 denotes an ALU which compares the lastly compressed data at the end of a self-test with the prediction value of a test result which is written in the self-test program 23a in advance. The compared result is output as a GO/NO GO result. Numeral 28 is a port which serves as an interface between the microprocessor 21 and external equipment. Numeral 29 is the X bus which serves as the bus for address and read data. Numeral 30 is a Y bus which is the bus for write data. Numeral 31 is a RAM and 32 is a timer.
The operation for executing a self-test in such a conventional microprocessor 21 will now be explained.
First, a test control signal is inputted to the microprocessor 21 from an external source setting the microprocessor 21 in a self-test mode. In the self-test mode, program counter 22 is set at a first address of the self-test program 23a in the program memory 23.
Next, according to the value indicated by the program counter 22, the self-test program 23a is executed successively. The self-test program 23a tests basic operations in order of "stack 26 and ALU 27".fwdarw."port 28".fwdarw."RAM 31".fwdarw."timer 32".
During test of part 28, input data required for executing the self-test are inputted to the port 28 from a source external to the microprocessor 21. Input data for executing the self-test of stack 26, ALU 27, timer 32, and other functional blocks of the system is obtained by accessing data in the region of data memory 24 prepared for self-test.
Test data executed in each functional block are outputted on the X bus 29. The test data output on the X bus 29 are compressed in the signature register 25. The compressed data are output to an external source through the port 28 at the completion of the test of each functional block.
Finally, the last compressed data at the end of self-test is compared with the prediction value in the ALU 27. The compared result is outputted to an external source as a GO/NO GO signal through the port 28 responsive to identity/no identity.
Though the program memory 23 and data memory 24 are not tested in the self-test program 23a, this test will be performed in a ROM test mode.
The conventional prior art semiconductor integrated circuit with self-test function is constructed such that when the input data are inputted from an outside source, many test vectors and external high speed hardwires are needed to input a number of control signals and input data which change in time series.
It has been difficult to implement a data memory region for self-test proportionately as the number of input data to be accessed at self-test increases.